FPGA solutions for the SEA algorithm are planned for introduction in 2008. Software solutions are available now for prototype applications.
Custom FPGA Designs from Concept to Implementation
- Custom Bus Interfaces & Controllers
- Data Collection & DSP
- Design-Validation & Verification
- TestBench - Design & Documentation
I/O Specification
- Functional performance Specification
- Design Reviews & DSP Design
MATLAB®
- Simulink®
- System Generator™ for Simulink-Xilinx
- Design, Synthesis, Implementation & Pre-Post simulation
Toolsets
- VHDL, Schematic
- Leonardo Spectrum - Mentor Graphics
- Xilinx ISE, Model Sim - Mentor Graphics
Hardware Implementation
A high performance digital signal processing (DSP) architecture for the FPR core processing algorithm is suitable for implementation into a FPGA or an ASIC and would be utilized as a hardware accelerator for the SEA Algorithm for use in any application.